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IBL-26-0696

Method for Improving Contact Characteristics Between Polythiophene Thin Film and Metal Electrode Interface Using Heat Treatment

Listed on
2026-10-28
P3HT Thin Film Treatment to Reduce Metal Electrode Contact Resistance via Melting Above Melting Point and Slow Cooling

This technology improves contact characteristics at the interface between a P3HT thin film (molecular weight 20–30 kDa) and a gold electrode by fully melting the film at temperatures up to 300°C—exceeding its melting point—followed by slow cooling to induce a rod-like morphology. The key is controlling the process so that only 3–10% of the deposited metal penetrates to a depth of 5–30% of the film thickness.

While P3HT is a solution-processable organic semiconductor, its use has been limited by low field-effect mobility and high operating voltages. Previous thermal annealing studies focused primarily on improving molecular alignment and failed to adequately address the interfacial contact resistance caused by deposited metal penetrating the thin film in top-contact structures.

By combining heating above the melting point with slow cooling, this technology shifts molecular orientation to an edge-on configuration and enhances crystallinity. This limits gold penetration, reducing contact resistance to 6.8–1.1 MΩ·cm. Applicable to top-contact organic thin-film transistors and low-cost flexible display backplanes, it provides a process solution that reduces interfacial resistance variation between devices through a single heat-treatment step before electrode deposition.

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Key Features:
  • Spin-coating poly(3-hexylthiophene) with a molecular weight of 20–30 kDa and a melting point of 200–225°C onto a substrate to form a polythiophene thin film
  • Fully melting the polythiophene thin film by heating it above its melting point to 300°C or less, for example at 240°C, for 10–30 minutes
  • Slowly cooling the fully melted thin film to transform its morphology into a rod-like structure
  • Depositing gold onto the cooled thin film such that only 3–10% of the total metal penetrates to a depth of 5–30% of the film thickness, forming a top-contact FET interface with a contact resistance of 6.8–1.1 MΩ·cm

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This invention was developed with support from the Ministry of Education for the analysis of charge transport mechanisms in π-electron molecular-based n-dimensional nanostructures.

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Incheon National University
Park Young-don
Document
Date of application:
2015-01-30
|
Patent registration number:
10-1653091
Industry
semiconductors
display
Technology
Semiconductor
Electric & Electronics
Country
Korea
Family Patent

N/A

Price
4000000
Fixed price
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